Proceedings of the sixth IEEE Symposium on FPGAs for Custom Computing Machines held in Napa Valley, California on April 15-17, 1998. Proceedings published by the IEEE Computer Society Press.

Steven Guccione / guccione@NOSPAM.io.com

[Alves and Matos, 1998]

J. C. Alves and J. S. Matos. RVC - a reconfigurable coprocessor for vector processing applications. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 258-259, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Arnold, 1998a]

Jeffrey M. Arnold. An architecture simulator for National Semiconductor's Adaptive Processing Architecture(NAPA). In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 271-272, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Arnold, 1998b]

Jeffrey M. Arnold. Mapping the MD5 hash algorithm onto the NAPA architecture. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 267-268, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Bellows and Hutchings, 1998]

Peter Bellows and Brad Hutchings. JHDL - an HDL for reconfigurable systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 175-184, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Bland and Megson, 1998]

I. M. Bland and G. M. Megson. The systolic array genetic algorithm, an example of systolic arrays as a reconfigurable design methodology. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 260-261, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Brebner, 1998]

Gordon Brebner. Circlets: Circuits as applets. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 300-301, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Chu et al., 1998]

Michael Chu, Kolja Sulimma, Nicholas Weaver, Andre DeHon, and John Wawrzynek. Object oriented circuit-generators in Java. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 158-166, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Crago et al., 1998]

Stephen P. Crago, Brian Schott, and Robert Parker. SLAAC: A distributed architecture for adaptive computing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 286-287, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Cronquist et al., 1998]

Darren C. Cronquist, Paul Franklin, Stefan G. Berg, and Carl Ebeling. Specifying and compiling applications for RaPiD. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 116-125, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Dandalis and Prasanna, 1998]

Andreas Dandalis and Viktor K. Prasanna. Mapping homogeneous computations onto dynamically configurable coarse-grained architectures. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 314-315, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Dollas et al., 1998a]

Apostolos Dollas, Euripides Sotiriades, and Apostolos Emmanonelides. Architecture and design of GE1, a FCCM for Golomb ruler derivation. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 48-56, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Dollas et al., 1998b]

Apostolos Dollas, Euripides Sotiriades, Apostolos Emmanouelides, and Lee House. General purpose vs. custom FCCM's: A comparison of splash2, Quickturn RPM, and GE1 for Golomb ruler derivation. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 269-270, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Doncev et al., 1998]

Goran Doncev, Miriam Leeser, and Shantanu Tarafdar. High level synthesis for designing custom computing hardware. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 326-327, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Duncan et al., 1998]

Andrew A. Duncan, David C. Hendry, and Peter Cray. An overview of the COBRA-ABS high level synthesis system for multi-FPGA systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 106-115, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Ferreira and Matos, 1998]

Joao Canas Ferreira and Jose Silva Matos. A prototype system for rapid application development using dynamically reconfigurable hardware. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 280-281, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[GajjalaPurna and Bhatia, 1998]

Karthikeya M. GajjalaPurna and Dinesh Bhatia. Temporal partitioning and scheduling for reconfigurable computing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 329-330, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Gokhale and Stone, 1998]

Maya B. Gokhale and Janice M. Stone. NAPA C: Compiling for a hybrid RISC/FPGA architecture. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 126-134, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Govindarajan et al., 1998]

Sriram Govindarajan, Iyad Ouaiss, Meenakshi Kaul, Vinoo Srinivasan, and Ranga Vemuri. An effective system for dynamically reconfigurable architectures. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 312-313, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Graham and Nelson, 1998]

Paul Graham and Brent Nelson. Frequency-domain sonar processing in FPGAs and DSPs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 306-307, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Gupta et al., 1998]

Nikhil D. Gupta, John K. Antonio, and Jack M. West. Reconfigurable computing for space-time adaptive processing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 335-336, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Haenni et al., 1998]

Jacques-Olivier Haenni, Jean-Luc Beuchat, and Eduardo Sanchez. RENCO: A reconfigurable network computer. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 288-289, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Hamada et al., 1998]

Tsuyoshi Hamada, Toshiyuki Fukushige, Atsushi Kawai, and Junichiro Makino. PROGRAPE-1: A programmable special-purpose computer for many-body simulations. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 256-257, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Hauck et al., 1998]

Scott Hauck, Zhiyuan Li, and Eric Schwabe. Configuration compression for the Xilinx XC6200 FPGA. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 138-146, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Haug and Rosenstiel, 1998]

G. Haug and W. Rosenstiel. Reconfigurable hardware as shared resource for parallel threads. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 320-321, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Haynes and Cheung, 1998]

Simon D. Haynes and Peter Y. K. Cheung. A reconfigurable multiplier array for video image processing tasks, suitable for embedding in an FPGA structure. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 226-234, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Hudson et al., 1998]

Rhett D. Hudson, David I. Lehn, and Peter M. Athanas. A run-time reconfigurable engine for image interpolation. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 88-95, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Hung and Wang, 1998]

Donald L. Hung and Jun Wang. A FPGA-based custom system for solving the assignment problem. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 298-299, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Jean et al., 1998]

Jack Jean, Karen Tomko, Vikram Yavgal, Robert Cook, and Jignesh Shah. Dynamic reconfiguration to support concurrent applications. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 302-303, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Kean and Duncan, 1998]

Tom Kean and Ann Duncan. DES key breaking, encryption and decryption on the XC6200. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 310-311, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Kugel et al., 1998]

A. Kugel, K. Kornmesser, R. Lay, J. Ludvig, R. Manner, K.-H. Noffz, S. Ruhl, M. Sessler, H. Simmler, and H. Singpiel. 50 kHz pattern recognition on the large FPGA processor enable++. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 262-263, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Kumar et al., 1998]

S. Kumar, L. Pires, D. Pandalai, M. Vojta, J. Golusky, S. Wadi, and H. Spaanenburg. Benchmarking technology for configurable computing system. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 273-274, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Lee and Sobelman, 1998]

Hanho Lee and Gerald E. Sobelman. Digit-serial library for optimized FPGA configuration. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 322-323, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Lee et al., 1998]

T. K. Lee, P. H. W. Leong, K. H. Lee, K. T. Chan, S. K. Hui, H. K. Yeung, M. F. Lo, and J. H. M. Lee. An FPGA implementation of GENET for solving graph coloring problems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 284-285, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Leong et al., 1998]

P. H. W. Leong, P. K. Tsang, and T. K. Lee. A FPGA based Forth microprocessor. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 254-255, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Ligon III et al., 1998]

Walter B. Ligon III, Scott McMillan, Greg Monn, Kevin Schoonover, Fred Stivers, and Keith D. Underwood. A re-evaluation of the practicality of floating point operations on FPGAs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 206-215, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Maltar et al., 1998]

Luiz Maltar, Felipe M. G. Franca, Vladmir C. Alves, and Claudio L. Amorim. Implementation of RNS addition and RNS multiplication into FPGAs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 331-332, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[McKay et al., 1998]

Nicholas McKay, Tom Melham, Kong Woei Susanto, and Satnam Singh. Dynamic specialization of XC6200 FPGAs by partial evaluation. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 308-309, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Mencer et al., 1998]

Oskar Mencer, Martin Morf, and Michael J. Flynn. PAM-Blox: High performance FPGA design for adaptive computing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 167-174, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Merino et al., 1998]

Pedro Merino, Margarida Jacome, and Juan Carlos Lopez. A methodology for task based partitioning and scheduling of dynamically reconfigurable systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 324-325, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Miyamori and Olukotun, 1998]

Takashi Miyamori and Kunle Olukotun. A quantitative analysis of reconfigurable coprocessors for multimedia applications. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 2-11, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Moe et al., 1998]

Matthew Moe, Herman Schmit, and Seth Copen Goldstein. Characterization and parameterization of a pipeline reconfigurable FPGA. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 294-295, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Moritz et al., 1998]

Csaba Andras Moritz, Donald Yeung, and Anant Agarwal. Exploring optimal cost-performance designs for raw microprocessors. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 12-27, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Mosanya et al., 1998]

Emeka Mosanya, Jean-Michel Puiatti, and Eduardo Sanchez. Hardware implementation of generalized profile search on the GENSTORM machine. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 290-291, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Motomura et al., 1998]

Masato Motomura, Yoshiharu Aimoto, Atsufumi Shibayama, Yoshikazu Yabe, and Masakazu Yamashina. An embedded DRAM-FPGA chip with instantaneous logic reconfiguration. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 264-266, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Nagami et al., 1998]

Kouichi Nagami, Kiyoshi Oguri, Tsunemichi Shiozawa, Hideyuki Ito, and Ryusuke Konishi. Plastic cell architecture: Towards reconfigurable computing for general purpose. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 68-77, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Ohta et al., 1998]

Akihisa Ohta, Tsuyoshi Isshiki, and Hiroaki Kunieda. New FPGA architecture for bit-serial pipeline datapath. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 58-67, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Ploog and Timmermann, 1998]

Hagen Ploog and Dirk Timmermann. FPGA based architecture evaluation of cryptographic coprocessors for smartcards. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 292-293, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Pocek and Arnold, 1998]

Kenneth L. Pocek and Jeffrey Arnold, editors. IEEE Symposium on FPGAs for Custom Computing Machines, Los Alamitos, CA, April 1998. IEEE Computer Society Press. Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 98.

[Poire et al., 1998]

Pascal Poire, Marc-Andre Cantin, Herve Daniel, Yves Blaquiere, and Yvon Savaria. A comparative analysis of fuzzy ART neural network implementations: The advantages or reconfigurable computing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 304-305, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Rashid et al., 1998]

Azra Rashid, Jason Leonard, and William H. Mangione-Smith. Dynamic circuit generation for solving specific problem instances of boolean satisfiability. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 196-204, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Rupp et al., 1998]

Charle R. Rupp, Mark Landguth, Tim Garverick, Edson Gomersall, H. Holt, Jeffrey M. Arnold, and Maya Gokhale. The NAPA adaptive processing architecture. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 28-37, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Sakr et al., 1998]

M. F. Sakr, S. P. Levitan, C. L. Giles, and D. M. Chiarulli. Reconfigurable processor architectures exploiting high bandwidth optical channels. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 275-276, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Scalera and Vazquez, 1998]

Stephen M. Scalera and Jose R. Vazquez. The design and implementation of a context switching FPGA. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 78-85, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Sezer et al., 1998]

S. Sezer, J. heron, R. Woods, R. Turner, and A. Marshall. Fast partial reconfiguration for FCCMs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 318-319, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Shaditalab et al., 1998]

Manoucher Shaditalab, Guy Bois, and Mohamad Sawan. Self sorting radix_2 FFT on FPGAs using parallel pipelined distributed arithmetic blocks. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 337-338, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Shand and Moll, 1998]

Mark Shand and Laurent Moll. Hardware/software integration in solar polarimetry. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 96-104, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Shirazi et al., 1998]

Nabeel Shirazi, Wayne Luk, and Peter Y.K. Cheung. Automating production of run-time reconfigurable designs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 147-156, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Singh and Slous, 1998]

Satnam Singh and Robert Slous. Accelerating Adobe Photoshop using the XC6200 FPGA. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 236-244, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Sivilotti et al., 1998]

Ruth Sivilotti, Young Cho, Wen-King Su, Danny Cohen, and Brian Bray. Scalable network based FPGA accelerators for an automatic target recognition application. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 282-283, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Soderman and Panchul, 1998]

Donald Soderman and Yuri Panchul. Implementing C algorithms in reconfigurable hardware using C2Verilog. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 339-342, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Stauffer et al., 1998]

Andre Stauffer, Moshe Sipper, and Andres Perez-Uribe. Some applications of FPGAs in bio-inspired hardware. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 278-279, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Swanchara et al., 1998]

Steve Swanchara, Scott Harper, and Peter Athanas. A stream-based configurable computing radio testbed. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 40-47, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Tenca and Ercegovac, 1998]

Alexandre F. Tenca and Milos D. Ercegovac. A variable long-precision arithmetic unit design suitable for reconfigurable coprocessor architectures. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 216-225, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Walters and Athanas, 1998]

Al Walters and Peter Athanas. A scaleable FIR filter using 32-bit floating-point complex arithmetic on a configurable computing machine. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 333-334, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Weiss et al., 1998]

Karlheinz Weiss, Ronny Kistner, Arno Kunzmann, and Wolfgang Rosenstiel. Analysis of the XC6000 architecture for embedded system design. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 245-252, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

[Zhong et al., 1998]

Peixin Zhong, Margaret Martonosi, Pranav Ashar, and Sharad Malik. Accelerating boolean satisfiability with configurable hardware. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 186-195, Los Alamitos, CA, April 1998. IEEE Computer Society Press.