Proceedings of the sixth IEEE Symposium on FPGAs for Custom Computing Machines held in Napa Valley, California on April 21-23, 1999. Proceedings published by the IEEE Computer Society Press.

Steven Guccione / guccione@NOSPAM.io.com

[Abramovici and de Sousa, 1999]

Miron Abramovici and Jose T. de Sousa. A virtual logic algorithm for solving satisfiability problems using reconfigurable hardware. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 306-307, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Alves et al., 1999]

J. Carlos Alves, J. Canas Ferreira, C. Albuquerque, Joseé F. Olivera, J. Soeiro Ferreira, and J. Silva Matos. FAFNER--accelerating nesting problems with FPGAs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 168-176, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Babb et al., 1999]

Jonathan Babb, Martin Rinard, Csaba Andras Moritz, Walter Lee, Matthew Frank, Rajeev Barua, and Saman Amarasinghe. Parallelizing applications into silicon. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 70-80, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Baxter, 1999]

Michael Baxter. ICARUS: A dynamically reconfigurable computer architecture. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 278-279, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Bazargan and Sarrafzadeh, 1999]

K. Bazargan and M. Sarrafzadeh. Fast online placement for reconfigurable computing systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 300-302, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Benyamin et al., 1999]

Daniel Benyamin, Wayne Luk, and John Villasenor. Optimizing FPGA-based vector product designs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 188-197, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Bondalapati and Prasanna, 1999]

Kiran Bondalapati and Viktor K. Prasanna. Dynamic precision management for loop computations on reconfigurable architectures. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 249-258, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Cadambi and Goldstein, 1999]

Srihari Cadambi and Seth Copen Goldstein. CPR: A configuration profiling tool. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 104-113, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Cardoso and Neto, 1999]

João M. P. Cardoso and Horácio C. Neto. Macro-based hardware compilation of java(tm) bytecodes into a dynamic reconfigurable computing system. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 2-11, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Chan et al., 1999]

P.K. Chan, M.J. Boyd, S. Goren, K. Klenk, V. Kodavati, R. Kundu, M. Margolese, J. Sun, K. Suzuki, E. Thorne, X. Wang, J. Xu, and M. Zhu. Reducing compilation time of Zhong's FPGA-based SAT solver. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 308-309, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Chien and Byun, 1999]

Andrew A. Chien and Jay H. Byun. Safe and protected execution for the Morph/AMRM reconfigurable processor. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 209-221, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Cousineau et al., 1999]

Cynthia Cousineau, Francois Laperle, and Yvon Savaria. Design of a JTAG based run time reconfigurable system. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 268-269, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Deshpande et al., 1999]

Deepali Deshpande, Arun K. Somani, and Akhilesh Tyagi. Hybrid data/configuration caching for striped FPGAs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 294-295, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Gao et al., 1999]

Lijun Gao, Sarvesh Shrivastava, Hanho Lee, and Gerald E. Sobelman. A compact fast variable key size elliptic curve cryptosystem coprocessor. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 304-305, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Gokhale and Stone, 1999]

Maya Gokhale and Jan Stone. Automatic allocation of arrays to memories in FPGA processors with multiple memory banks. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 63-69, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Hauck and Wilson, 1999]

Scott Hauck and William D. Wilson. Runlength compression techniques for FPGA configurations. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 286-287, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Haynes et al., 1999]

Simon D. Haynes, Peter Y.K. Cheung, Wayne Luk, and John Stone. SONIC - a plug-in architecture for video processing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 280-281, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Heron and Woods, 1999]

J.-P. Heron and R.F. Woods. Accelerating run-time reconfiguration on FCCMs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 260-261, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Hess et al., 1999]

Jason Hess, David Lee, Scott Harper, Mark Jones, and Peter Athanas. Implementation and evaluation of a prototype reconfigurable router. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 44-50, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Hutchings et al., 1999]

Brad Hutchings, Peter Bellows, Joseph Hawkins, Scott Hemmert, Brent Nelson, and Mike Rytting. A CAD suite for high-performance FPGA design. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 12-24, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Hwang et al., 1999]

James Hwang, Cameron Patterson, and Sujoy Mitra. VHDL placement directives for parametric IP blocks. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 284-285, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Jean et al., 1999]

Jack Jean, Xuejun Liang, Brian Drozd, and Karen Tomko. Accelerating an IR automatic target recognition application with FPGAs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 290-291, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Jones et al., 1999]

Mark Jones, Luke Schraf, Jonathan Scott, Chris Twaddle, Matthew Yaconis, Kuan Yao, and Peter Athanas. Implementing an API for distributed adaptive computing systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 222-230, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Kastrup et al., 1999]

Bernardo Kastrup, Arjan Bink, and Jan Hoogerbrugge. ConCISe: A compiler-driven CPLD-based instruction set accelerator. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 92-101, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Kim et al., 1999]

Hue-Sung Kim, Arun K. Somani, and Akhilesh Tyagi. On reconfiguring cache for computing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 296-297, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Koch, 1999]

Andreas Koch. Enabling automatic module generation for FCCM compilers. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 274-275, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Lau et al., 1999]

Daniel Lau, Aaron Schneider, Milos D. Ercegovac, and John Villasenor. FPGA-based structures for on-line FFT and DCT. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 310-311, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Laufer et al., 1999]

Ronald Laufer, R. Reed Taylor, and Herman Schmit. PCI-PipeRench and the SwordAPI: A system for stream-based reconfigurable computing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 200-208, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Leong et al., 1999]

M. P. Leong, M. Y. Yeung, C. K. Yeung, C. W. Fu, P. A. Heng, and P. H. W. Leong. Automatic floating to fixed point translation and its application to post-rendering 3D warping. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 240-248, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Levine et al., 1999]

Benjamin Levine, Senthil Natarajan, Chandra Tan, Danny Newport, and Don Bouldin. Mapping of an automated target recognition application from a graphical software environment to FPGA-based reconfigurable hardware. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 292-293, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Luk et al., 1999]

W. Luk, T.K. Lee, J.R. Rice, N. Shirazi, and P.Y.K. Cheung. Reconfigurable computing for augmented reality. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 136-145, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Luo et al., 1999]

Zhen Luo, Margaret Martonosi, and Pranav Ashar. An edge-endpoint-based configurable hardware architecture for VLSI CAD layout design rule checking. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 158-167, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[MacVicar et al., 1999]

Donald MacVicar, Satnam Singh, and Robert Slous. Bézier curve rendering on Virtex(tm). In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages --, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Maltar et al., 1999]

Luiz Maltar, Felipe M.G. Franca, Vladimir C. Alves, and Cláudio L. Amorim. An FPGA-based fan beam image reconstruction module. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 312-313, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[McKay and Singh, 1999]

Nicholas McKay and Satnam Singh. Debugging techniques for dynamically reconfigurable hardware. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 114-122, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Miyazaki et al., 1999]

Toshiaki Miyazaki, Takahiro Murooka, Masaru Katayama, and Atsushi Takahara. Transmutable telecom system and its application. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 34-43, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Moeller and Martinez, 1999]

Tyler J. Moeller and David R. Martinez. Field programmable gate array based radar front-end digital signal processing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 178-187, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Moll et al., 1999]

Laurent Moll, Alan Heirich, and Mark Shand. Sepia: scalable 3D compositing using PCI Pamette. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 146-155, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Orlando and Paar, 1999]

Gerardo Orlando and Christof Paar. A super-serial galois fields multiplier for FPGAs and its application to public-key algorithms. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 232-239, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Pauer et al., 1999]

Eric K. Pauer, Paul D. Fiore, and John M. Smith. Algorithm analysis and mapping environment for adaptive computing systems: Further results. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 264-265, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Piacentino et al., 1999]

Michael Piacentino, Gooitzen van der Wal, and Michael Hansen. Reconfigurable elements for a video pipeline processor. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 82-91, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Pocek and Arnold, 1999]

Kenneth L. Pocek and Jeffrey Arnold, editors. IEEE Symposium on FPGAs for Custom Computing Machines, Los Alamitos, CA, April 1999. IEEE Computer Society Press. Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 99.

[Schott et al., 1999]

Brian Schott, Chen Chen, Steve Crago, Joe Czarnaski, Matt French, Ivan Hom, Tam Tho, and Terri Valenti. Architectures for system-level applications of adaptive computing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 270-271, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Singh and Block, 1999]

Satnam Singh and Carl Johan Block. Formal verification of reconfigurable cores. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 25-32, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Sklyarov et al., 1999]

V. Sklyarov, J. Fonseca, R. Monteiro, A. Oliveira, A. Melo, N. Lau, I. Skliarova, P. Neves, and A. Ferrari. Development system for FPGA-based digital circuits. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 266-267, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Srinivasan and Vemuri, 1999]

Vinoo Srinivasan and Ranga Vemuri. Task-level partitioning and RTL design space exploration for multi-FPGA architectures. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 272-273, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Teuscher et al., 1999]

Christof Teuscher, Jacques-Oliver Haenni, Francisco J. Gómez, Héctor F. Restrepo, and Eduardo Sanchez. A reconfigurable platform for academic purposes. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 282-283, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Turner et al., 1999]

R. Turner, R. F. Woods, S. Sezer, and J. Heron. A virtual hardware handler for RTR systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 262-263, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Vasilko and Cabanis, 1999]

Milan Vasilko and David Cabanis. Improving simulation accuracy in design methodologies for dynamically reconfigurable logic systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 123-133, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Weinhardt and Luk, 1999]

Markus Weinhardt and Wayne Luk. Pipeline vectorization for reconfigurable systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 52-62, Los Alamitos, CA, April 1999. IEEE Computer Society Press.

[Williams and Kuebert, 1999]

Ronald D. Williams and Brian D. Kuebert. Reconfigurable pipelines in VLIW execution units. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 298-299, Los Alamitos, CA, April 1999. IEEE Computer Society Press.