Printed as More FPGAs by Will R. Moore and Wayne Luk, published by Abingdon EE and CS Books, Abingdon, England, 1993. Edited from the Third International Workshop on Field Programmable Logic and Applications held at Oxford University in September 1993.

Steven Guccione / guccione@NOSPAM.io.com

[Adé et al., 1993]

Marleen Adé, Rudy Lauwereins, Marc Engels, and Jean A. Peperstraete. Communication primitives on FPGAs in a heterogeneous multi-processor emulation environment. In Will Moore and Wayne Luk, editors, More FPGAs, pages 170-181. Abingdon EE&CS Books, Abingdon, England, 1993.

[Arnold and Buell, 1993]

Jeffrey M. Arnold and Duncan A. Buell. VHDL progamming on splash 2. In Will Moore and Wayne Luk, editors, More FPGAs, pages 182-191. Abingdon EE&CS Books, Abingdon, England, 1993.

[Bellini et al., 1993]

Alesssandro Bellini, Omero Bigalli, and Franco Pirri. Modular statecharts for designing parallel controllers. In Will Moore and Wayne Luk, editors, More FPGAs, pages 158-168. Abingdon EE&CS Books, Abingdon, England, 1993.

[Bhat, 1993]

Narasimha B. Bhat. A new library-based mapper for LUT FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 138-148. Abingdon EE&CS Books, Abingdon, England, 1993.

[Blickle et al., 1993]

Tobias Blickle, Joachim König, and Lothar Tidele. A prototyping array for parallel architectures. In Will Moore and Wayne Luk, editors, More FPGAs, pages 389-397. Abingdon EE&CS Books, Abingdon, England, 1993.

[Boemo et al., 1993]

Eduardo Boemo, Juan Meneses, Guillermo González de Rivera, and Fernando Barbero. Field-programmable logic in education: a case study. In Will Moore and Wayne Luk, editors, More FPGAs, pages 452-457. Abingdon EE&CS Books, Abingdon, England, 1993.

[Brunvand, 1993]

Erik Brunvand. Windchime: an FPGA-based self-timed parallel processor. In Will Moore and Wayne Luk, editors, More FPGAs, pages 365-376. Abingdon EE&CS Books, Abingdon, England, 1993.

[Carpenter et al., 1993]

Andy Carpenter, Peter Jones, and Kamaran Zamanian. Determining optimal architectures for configurable devices. In Will Moore and Wayne Luk, editors, More FPGAs, pages 47-56. Abingdon EE&CS Books, Abingdon, England, 1993.

[Dossis et al., 1993]

M. F. Dossis, J. M. Noras, and G. J. Porter. Custom co-processor compilation. In Will Moore and Wayne Luk, editors, More FPGAs, pages 202-212. Abingdon EE&CS Books, Abingdon, England, 1993.

[Duggan et al., 1993]

Paul Duggan, Robert Haycock, and Trevor York. A field-programmable multi-chip module for implementing boolean neural networks. In Will Moore and Wayne Luk, editors, More FPGAs, pages 24-34. Abingdon EE&CS Books, Abingdon, England, 1993.

[Fagin and Erickson, 1993]

Barry Fagin and John Erickson. DartMIPS: a case study in quantitative analysis of processor design tradeoffs using FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 353-364. Abingdon EE&CS Books, Abingdon, England, 1993.

[Fawcett, 1993]

Bradly K. Fawcett. Applications of reconfigurable logic. In Will Moore and Wayne Luk, editors, More FPGAs, pages 57-69. Abingdon EE&CS Books, Abingdon, England, 1993.

[Foulk, 1993]

Patrick Foulk. Reconfigurable computing with SRAM programmable gate arrays. In Will Moore and Wayne Luk, editors, More FPGAs, pages 70-81. Abingdon EE&CS Books, Abingdon, England, 1993.

[Frankle et al., 1993]

Jon Frankle, Bradley Fawcett, and Roman Iwanczuk. Specifying and accomimoditing FPGA timing requirements. In Will Moore and Wayne Luk, editors, More FPGAs, pages 96-109. Abingdon EE&CS Books, Abingdon, England, 1993.

[Gopisetty and Lan, 1993]

Runip Gopisetty and Sanko H. Lan. Exploration of multiplexer-based FPGA logic modules. In Will Moore and Wayne Luk, editors, More FPGAs, pages 5-12. Abingdon EE&CS Books, Abingdon, England, 1993.

[Guccione and Gonzalez, 1993]

Steven A. Guccione and Mario J. Gonzalez. A neural network implementation using reconfigurable architectures. In Will Moore and Wayne Luk, editors, More FPGAs, pages 443-451. Abingdon EE&CS Books, Abingdon, England, 1993.

[Howard et al., 1993]

Neil Howard, Andrew Tyrrell, and Nigel Allinson. FPGA acceleration of electronic design automation tasks. In Will Moore and Wayne Luk, editors, More FPGAs, pages 337-344. Abingdon EE&CS Books, Abingdon, England, 1993.

[Hurdle et al., 1993]

John Hurdle, Lüli Josephson, and Erik Brunvand. Reliable interfacing of self-timed FPGA-based neural classifiers to synchronous parts. In Will Moore and Wayne Luk, editors, More FPGAs, pages 377-388. Abingdon EE&CS Books, Abingdon, England, 1993.

[Isoaho et al., 1993]

Jouni Isoaho, Juha Nousiainen, and Olli Vainio. FPGA-implementable digital filters. In Will Moore and Wayne Luk, editors, More FPGAs, pages 281-290. Abingdon EE&CS Books, Abingdon, England, 1993.

[Jebelean, 1993]

Tudor Jebelean. Rational arithmetic using FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 262-273. Abingdon EE&CS Books, Abingdon, England, 1993.

[Jhitta, 1993]

Malkit S. Jhitta. Introduction of a new FPGA architecture. In Will Moore and Wayne Luk, editors, More FPGAs, pages 13-23. Abingdon EE&CS Books, Abingdon, England, 1993.

[Kappler et al., 1993]

Christopher Kappler, John Oldfield, Kang Shen, and Charles Stormon. Genetic string distance evaluation with an array of self-timed FPGA chips. In Will Moore and Wayne Luk, editors, More FPGAs, pages 434-443. Abingdon EE&CS Books, Abingdon, England, 1993.

[Koch and Golze, 1993]

Andreas Koch and Ulrich Golze. A universal co-processor for workstations. In Will Moore and Wayne Luk, editors, More FPGAs, pages 317-328. Abingdon EE&CS Books, Abingdon, England, 1993.

[König and Thiele, 1993]

Joachim König and Lotliar Thiele. A high-speed FPGA-based interface to high-bandwidth hardware. In Will Moore and Wayne Luk, editors, More FPGAs, pages 345-352. Abingdon EE&CS Books, Abingdon, England, 1993.

[Leeser et al., 1993]

Miriam Leeser, Richard Chapman, Michael Bertone, and Alan Wenban. Implementing filters with programmable logic. In Will Moore and Wayne Luk, editors, More FPGAs, pages 192-201. Abingdon EE&CS Books, Abingdon, England, 1993.

[Loy, 1993]

Dietmar Loy. Correlative ultrasonic distance measurement system. In Will Moore and Wayne Luk, editors, More FPGAs, pages 428-433. Abingdon EE&CS Books, Abingdon, England, 1993.

[Luk et al., 1993]

Wayne Luk, David Ferguson, and Ian Page. Structured hardware compilation of parallel programs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 213-224. Abingdon EE&CS Books, Abingdon, England, 1993.

[Lysaght and Dunlop, 1993]

Patrick Lysaght and John Dunlop. Dynamic reconfiguration of FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 82-94. Abingdon EE&CS Books, Abingdon, England, 1993.

[Mayrhofer and Strachwitz, 1993]

Josef Mayrhofer and Johannes Strachwitz. A control circuit for electrical drives based on transputers and FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 420-427. Abingdon EE&CS Books, Abingdon, England, 1993.

[Monaghan and Istiyanto, 1993]

Sean Monaghan and Jazi Eko Istiyanto. High-level hardware synthesis for large scale computational physics targetted at FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 238-248. Abingdon EE&CS Books, Abingdon, England, 1993.

[Moore and Luk, 1993]

Will Moore and Wayne Luk, editors. More FPGAs. Abingdon EE&CS Books, Abingdon, England, 1993. edited from the 1993 International Workshop on Field Programmable Logic and Applications.

[Morán et al., 1993]

Javier Morán, Ignacio Rios, and Juan Meneses. Signed digit arithmetic on FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 250-261. Abingdon EE&CS Books, Abingdon, England, 1993.

[Nakada et al., 1993]

Hiroshi Nakada, Kazuhisa Yamada, Akihiro Tsutsui, and Naohisa Ohta. A design method for realising real-time circuits on mulfiple-FPGA systems. In Will Moore and Wayne Luk, editors, More FPGAs, pages 129-137. Abingdon EE&CS Books, Abingdon, England, 1993.

[Ng, 1993]

Kam W. Ng. A writeable instruction set co-processor using FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 329-336. Abingdon EE&CS Books, Abingdon, England, 1993.

[Owen et al., 1993]

Henry L. Owen, Ubaid R. Khan, and Joseph L. A. Hughes. FPGA-based emulator architectures. In Will Moore and Wayne Luk, editors, More FPGAs, pages 398-409. Abingdon EE&CS Books, Abingdon, England, 1993.

[Page, 1993]

Ian Page. Parameterised processor generation. In Will Moore and Wayne Luk, editors, More FPGAs, pages 225-237. Abingdon EE&CS Books, Abingdon, England, 1993.

[Pearce et al., 1993]

Maureen Pearce, Jonathan Saul, and Nigel Lester. Synthesis strategies for concurrent logic FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 149-157. Abingdon EE&CS Books, Abingdon, England, 1993.

[Raman et al., 1993]

Srilata Raman, C. L. Liu, and Larry G. Jones. Timing-based placement for an FPGA design environment. In Will Moore and Wayne Luk, editors, More FPGAs, pages 110-119. Abingdon EE&CS Books, Abingdon, England, 1993.

[Ross et al., 1993]

David Ross, Oliver Vellacott, and Martin Turner. An FPGA-based hardware accelerator for image processing. In Will Moore and Wayne Luk, editors, More FPGAs, pages 299-306. Abingdon EE&CS Books, Abingdon, England, 1993.

[Schubert et al., 1993]

Endric Schubert, Udo Kebschull, and Wolfgang Rosenstiel. The use of FPGAs for educational purposes in VLSI microprocessor design. In Will Moore and Wayne Luk, editors, More FPGAs, pages 458-465. Abingdon EE&CS Books, Abingdon, England, 1993.

[Shoup, 1993]

Richard G. Shoup. Parameterized convolution filtering in an FPGA. In Will Moore and Wayne Luk, editors, More FPGAs, pages 274-280. Abingdon EE&CS Books, Abingdon, England, 1993.

[Tse et al., 1993a]

Kai Wing Tse, Cheung Hoi Leung, and Ka Fai Cheng. Implementation of pre-processing and feature extraction of chinese characters with FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 307-314. Abingdon EE&CS Books, Abingdon, England, 1993.

[Tse et al., 1993b]

Kai Wing Tse, Tung Ip Yuk, and Shu Sing Chan. Implementation of the data encryption standard algorithm with FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 412-420. Abingdon EE&CS Books, Abingdon, England, 1993.

[Wahab and Puckey, 1993]

Mohamed Wahab and Darren Puckey. FPGA-based DSP systems. In Will Moore and Wayne Luk, editors, More FPGAs, pages 291-298. Abingdon EE&CS Books, Abingdon, England, 1993.

[Wang and Gulak, 1993]

Qiang Wang and P. Glenn Gulak. An array architecture for reconfigurable datapaths. In Will Moore and Wayne Luk, editors, More FPGAs, pages 35-46. Abingdon EE&CS Books, Abingdon, England, 1993.

[Weinmann, 1993]

Ulrich Weinmann. FPGA partitioning under timing constraints. In Will Moore and Wayne Luk, editors, More FPGAs, pages 120-128. Abingdon EE&CS Books, Abingdon, England, 1993.