Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, John Schewel, Editor.

From papers presented at the International Society for Optical Engineering (SPIE) Photonics East conference held in Philadelphia, Pennsylvania on October 25--26, 1995.

Steven Guccione / guccione@NOSPAM.io.com

[Abbott et al., 1995]

A. L. Abbott, P. M. Athanas, and A. Tarmaster. Accelerating image filters using a custom computing machine. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 62-70, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Acosta et al., 1995]

F. K. Acosta, V. M. Bove, Jr., J. A. Watlington, and R. A. Yu. Reconfigurable processor for a data-flow video processing system. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 83-91, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Boemo et al., 1995]

E. I. Boemo, F. Barbero, J. Faura, J. Jáuregui, and J. Meneses. Programmable real-time FIR filter logic device. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 22-29, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Casselman et al., 1995]

S. Casselman, M. Thornburg, and J. Schewel. Hardware oblect programming on the EVC1: a reconfigurable computer. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 168-176, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Chow et al., 1995]

H. A. Chow, A. Elnaggar, and H. M. Alnuweiri. Highly parallel signal processing on the virtual computer. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 42-53, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Cook et al., 1995]

T. A. Cook, H.-R. Kim, and L. Louca. Hardware acceleration of n-body simulations for galactic dynamics. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 115-126, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Coven, 1995]

P. J. Coven. Design tips and experiences in using reconfigurable FLEX devices. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 128-135, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Culbertson et al., 1995]

W. B. Culbertson, R. Amerson, R. J. Carter, P. J. Kuekes, and G. Snider. Teramac configurable custom computer. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 201-209, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Dao et al., 1995]

M. Dao, T. A. Cook, and D. F. Silver. Low-cost hardware acceleration for volume visualization. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 104-114, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Dick and Harris, 1995]

C. Dick and F. J. Harris. FPGA implementation of high-order FIR filters by requantizing the input data stream. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 10-21, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Ercegovac et al., 1995]

M. D. Ercegovac, M. Muller, and A. Tisserand. FPGA implementation of polynomial evaluation algorithms. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 177-188, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Erdogan et al., 1995]

S. S. Erdogan, A. B. Wahab, and K. Jainandunsing. Reconfigurable computing for multimedia DSP applications. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 2-9, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Fawcett, 1995]

B. K. Fawcett. Field programmable gate arrays and reconfigurable computing. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 155-166, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Guccione and Gonzalez, 1995]

S. A. Guccione and M. J. Gonzalez. FFT on reconfigurable hardware. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 30-41, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Hadley and Hutchings, 1995]

J. D. Hadley and B. L. Hutchings. Designing a partially reconfigured system. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 210-220, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Klein, 1995]

H. W. Klein. Circuit development using EPAC technology: an analog FPGA. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 136-144, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Léonhard et al., 1995]

G. Léonhard, E. Cousin, J.-D. Laisne, J. Le Drezen, G. Ouvradou, A. Poulain Maubant, and A. Thépaut. ArMenX: a flexible platform for signal and image processing. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 71-82, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[McHenry and Donaldson, 1995]

J. T. McHenry and R. L. Donaldson. WILDFIRE custom configurable computer. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 189-200, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Rosenberg, 1995]

J. Rosenberg. DSP acceleration using cache logic FPGAs. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 54-59, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Schewel, 1995]

John Schewel, editor. Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607. SPIE -- The International Society for Optical Engineering, Bellingham, WA, October 1995. Proceedings from the session at the SPIE Photonics East conference held in Philadelphia, Pennsylvania on October 25-26, 1995.

[Shand et al., 1995]

M. Shand, W. Wei, and G. B. Scharmer. 3.8-ms latency correlation tracker for active mirror control based on a reconfigurable interface to a standard workstation. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 145-154, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.

[Wirthlin and Hutchings, 1995]

M. J. Wirthlin and B. L. Hutchings. DISC: the dynamic instruction set computer. In John Schewel, editor, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pages 92-103, Bellingham, WA, October 1995. SPIE -- The International Society for Optical Engineering.